Electronics | Build-up CSP

Buid-up CSP is suitable for Wire bonding and Flip Chip bonding, applying Build-up technology, using insulator layer made of the glass-reinforced-laminates, and fine pitch patterning technology with utilizing ultra thin copper foil.
Ultra-small vias and fine pitch patterning technologies allow high density routing and realize small sized package substrates. Also, we can offer total solution from substrate design to high volume manufacturing, including simulation technology for achieving electric requirement for high speed performance.

Features

  • Fine patterning technology for high density design
  • Build up structure for high design flexibility
  • High reliability in connection and isolation
  • Adoption of low CTE material suitable for PoP
  • Achievement of thin Flip chip CSP
  • Thin MLCC component high-functioning and high density

Specifications

    Build-up CSP High Density
Build-up CSP
Outer Layer L/S 20/20 µm 15/15 µm
Pad/Via 135/65 µm 115/65 µm
Inner Layer L/S 30/30 µm 25/25 µm
Pad/Via 180/80 µm 140/80 µm
Thickness 4L Build Up 180 µm 180µm
6L Build Up 260 µm 260 µm
Via Stack(Filled Via) Available
Pad on via (Filled Via) Available
Surface Finish E’lytic NiAu, E’less NiPdAu, E’lytic Tin, OSP
Ball Pitch 400 µm 400 µm
FC Pitch Area Array 150 µm 140 µm
Peripheral 60 µm 40 µm

Applications

  • Mobile Phone
  • Tablet PC
  • Digital Still Camera
  • Other Mobile Products
  • Next Generation Compact Packages

FCCSP: CSP substrates optimized for a large number of pins and the demand of high-speed. They are compatible with high-density flip chip mounting.

FCCSP cross section

Thin MLCC component

Please contact at the following address for any inquiries and any requests for quotations regarding Build-up CSP.
For Inquiries

Business Administration Group
Business Administration Group Division
Package Substrate Unit
Electronic Circuits Operation
3-200 Gama-cho, Ogaki, Gifu 503-8559, Japan

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