Electronics | Build-up CSP

Buid-up CSP is suitable for Wire bonding and Flip Chip bonding, applying Build-up technology, using insulator layer made of the glass-reinforced-laminates, and fine pitch patterning technology with utilizing ultra thin copper foil.
Ultra-small vias and fine pitch patterning technologies allow high density routing and realize small sized package substrates. Also, we can offer total solution from substrate design to high volume manufacturing, including simulation technology for achieving electric requirement for high speed performance.


  • Fine patterning technology for high density design
  • Build up structure for high design flexibility
  • High reliability in connection and isolation
  • Adoption of low CTE material suitable for PoP
  • Achievement of thin Flip chip CSP
  • Thin MLCC component high-functioning and high density


Outer Layer L/S 15/15 µm~
Pad/Via 100/65 µm
Inner Layer L/S 25/25 µm
Pad/Via 140/70 µm
Thickness 4L Build Up 180µm
6L Build Up 260 µm
Via Stack(Filled Via) Available
Pad on via (Filled Via) Available
Surface Finish E’lytic NiAu, E’less NiPdAu, E’lytic Tin, OSP
Ball Pitch 400 µm,350 µm
FC Pitch Area Array 140 µm
Peripheral 40 µm


  • Smartphones
  • Mobile Phone
  • Tablet PC
  • Digital Still Camera
  • Other Mobile Products
  • Next Generation Compact Packages

FCCSP: CSP substrates optimized for a large number of pins and the demand of high-speed. They are compatible with high-density flip chip mounting.

FCCSP cross section

Thin MLCC component

Please contact at the following address for any inquiries and any requests for quotations regarding Build-up CSP.
For Inquiries

Bueiness &Administration Division
3-200 Gama-cho, Ogaki, Gifu Prefecture 503-8559, Japan